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Product Transformation and Heuristic EXOR-AND-OR Logic Synthesis of Incompletely Specified Functions JOURNAL ARTICLE published November 2017 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Table of contents JOURNAL ARTICLE published September 2010 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Table of contents JOURNAL ARTICLE published February 2018 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Introducing IEEE Collabratec JOURNAL ARTICLE published March 2016 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Announcing Terahertz Letters JOURNAL ARTICLE published March 2016 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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An Error-Tolerance-Based Test Methodology to Support Product Grading for Yield Enhancement JOURNAL ARTICLE published June 2011 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Tensor Optimization for High-Level Synthesis Design Flows JOURNAL ARTICLE published November 2020 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems JOURNAL ARTICLE published June 2022 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Research funded by NSF CRI Award (1512937) | NSF SHF Award (1527065) | NSF SHF (1909661) | DARPA SDH Award (FA8650-18-2-7863) |
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An Efficient Data Migration Scheme to Optimize Garbage Collection in SSDs JOURNAL ARTICLE published March 2021 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Research funded by NSFC (61821003,61872413,U1709220,61902137) | Key-Area Research and Development Program of Guangdong Province (2019B010107001) | Higher Education Discipline Innovation Project (B07038) | Key Project of Shandong Wisdom Joint Fund (ZR2019LZH009) |
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An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance JOURNAL ARTICLE published November 2013 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Design and Modeling of Optimum Quality Spiral Inductors With Regularization and Debye Approximation JOURNAL ARTICLE published November 2010 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Accurate X-Propagation for Test Applications by SAT-Based Reasoning JOURNAL ARTICLE published December 2012 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems information for authors JOURNAL ARTICLE published January 2017 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Member Get-A-Member (MGM) Program JOURNAL ARTICLE published February 2016 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Testing Ternary Content Addressable Memories With Comparison Faults Using March-Like Tests JOURNAL ARTICLE published May 2007 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Verifying RLC Power Grids With Transient Current Constraints JOURNAL ARTICLE published July 2013 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Efficient Production Binning Using Octree Tessellation in the Alternate Measurements Space JOURNAL ARTICLE published August 2016 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Research funded by Spanish Ministry of Economics and Competitiveness (TEC2010-18384,TEC2013-41209-P) |
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Software Model Checking SystemC JOURNAL ARTICLE published May 2013 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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Accelerate Safety Model Checking Based on Complementary Approximate Reachability JOURNAL ARTICLE published September 2023 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Research funded by National Key Research and Development Program (2020AAA0107800) | Shanghai Pujiang Talent Plan (20PJ1403500) | National Natural Science Foundation of China (62002118,U21B2015) |
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Fast Positive-Real Balanced Truncation Via Quadratic Alternating Direction Implicit Iteration JOURNAL ARTICLE published September 2007 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |